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FS: 04/93 Page 1 SIEMENS AG TDA 4362 X IC-SPECIFICATION ----------------------------------------------------------------- Differences to the last edition Last Edition: Page 11: DOK-Nr. V66047-S1603-C200-G1 #P7: Test values and units changed #P8: Test values and units changed #P11: Test values changed, wrong values in previous version #P21,22: Min max values added #P23: Load resistor added and values changed date: 11.12.97 Page 12: ----------------------------------------------------------------- The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 2 SIEMENS AG TDA 4362 X IC-SPECIFICATION ----------------------------------------------------------------- Table of Contents AM- Updown - Conversion Signature Differences to the last edition Table of Contents Functional Description, Application Circuit Description Block Diagram Pin Assignment Pin Description Package Outline Absolute Maximum Ratings Operational Range AC / DC Characteristics Test Circuit Application Circuit Page Page Page Page Page Page Page Page Page Page Page Page Page Page 0 1 2 3 4 5 6 7 8 9 10 11 ... 12 13 14 This specification replaces the previous editions DOK-Nr. V66047-S1603-C200-G1 date 11.12.97 DOK-Nr. date The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 3 SIEMENS AG TDA 4362 X IC-SPECIFICATION ----------------------------------------------------------------- Functional Description, Application Dual-Conversion-AM-Receiver The TDA 4362 X is an integrated Dual-Conversion- AM-Receiver for use in car radios. The input signal passes a linear mixer for conversion into the 1.IF (10 MHz) . Via an external bandpass-filter (CER-filter, quartz filter) the 1. IF is converted in a second linear mixer to the 2. IF (450kHz). After an external narrowband-selectivity (CER-filter) the 2. IF passes an automatic gain controlled amplifier and is then demodulated to the AF. Features * * * * * * * * * * * * High flexibility with an external preamplifier stage Symmetrical or asymmetrical mixer input 2-Pin-Oscillator for the 1. LO 1. LO with LC-tank circuit 1. LO in 60 to 160 MHz range Low narrow band noise Divider for 1. LO by 6, 10 Integrated AGC generation for the prestages Strictly symmetrical RF path Decoupled direct and divided counter outputs 2. LO with external source input Output for gain controlled 2. IF ----------------------------------------------------------------- The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 4 SIEMENS AG TDA 4362 X IC-SPECIFICATION ----------------------------------------------------------------- Circuit Description The integrated circuit includes a 2-Pin oscillator (1.LO) with sym. input, buffered output and a double balanced mixer with symmetrical input. This stage converts the AM-Inputsignal to a 1. IF, which is much higher (10 MHz) than the input frequencies. The 1. LO operates as a LC-varactor tuned oscillator in the same 100 MHz range like the FM-Tuner oscillator ( e.g. TUA 4310 X) . So the same peripherial elements can be used. Depending on the signal strength the prestage AGC controls a MOSFET-prestage amplifier. The 1. IF passes an external selectivity and is then converted in a symmetrical double balanced mixer to the 2. IF. The 2. LO operates as an amplifier for an external forcing signal. The 2. IF signal passes an automatic gain controlled IF amplifier and is then demodulated to the AF in a quasisynchronous-demodulator. For AM-Stereo application a gain controlled output of the 2. IF is available. The TDA 4362 X is prepared to work with a PLL in the 100MHz range. When applied with a standard AM-PLL the oscillator frequency divided by 6 or 10 has to be used. In this case a higher phase noise is to be expected. ----------------------------------------------------------------- .The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved HL DOK V66047-S1603-C200-G2 20.4.99 SIEMENS AG ------------------------------------------------------------------------------------------------------ Block Diagram +Vref TDA 4362 X IC-SPECIFICATION FS: 04/93 +V VS S VPrestage 12 10 11 7 8 4 5 2 IF2 1 26 25 24 IF 1 out PRESTAGE AGC out AGC Amplifier 27 AMStereoDecoder AGC 13 14 fOsc /n 19 6, 10 C fOsc 17 18 1. LO 2. LO 20 21 15 3 6 +VS 16 VRef 28 VForce 22 9 AGC Time AFout 23 Page 5 The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 6 SIEMENS AG TDA 4362 X IC-SPECIFICATION ----------------------------------------------------------------- Pin Assignment Pin configuration 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 2. Mixer output 2. Mixer output Ground (LF) 2. Mixer input 2. Mixer input Supply voltage 1. Mixer output 1. Mixer output AGC-time constant switch Prestage voltage output Prestage time constant Prestage threshold Mixer 1 input Mixer 1 input Ground Reference voltage (RF) Counter ratio C Counter output direct Counter output divided Local oscillator Local oscillator LIF time constant AF output LIF input (blocked to LF GND) LIF input active LIF input (blocked to LF GND) AM output 2. LO force input ----------------------------------------------------------------- The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 7 SIEMENS AG TDA 4362 X IC-SPECIFICATION ---------------------------------------------------------------- Pin Description Pin 1,2: Pin 3: Pin 4,5: Open collector output of mixer 2 for the lower IF (450 kHz) GROUND: All LF blocking capacitors should be connected to this point. Sym. mixer 2 input for the upper IF (10.7 MHz). Asym. operation is possible. The input signal is converted to the lower IF corresponding the equation fLIF = fUIF - f2.LO Pin 6: Pin 7,8: Supply-voltage. This point is to be blocked to ground for AF and for RF-Signals Sym collector output of the mixer 1. The external tank circuit is tuned to the upper IF. Pin 9: Pin 10: Pin 11: Pin 12: Pin 13,14: Pin 15: Pin 16: Pin17: Pin 18: Pin 19: Pin 20,21: Pin 22: Pin 23: Pin 24,25,26: Pin 27: Pin 28: DC-Voltage determines the AGC-Time. GND: normal mode Vref: fast mode Buffered prestage AGC output Blocking capacitor for the prestage AGC DC-Voltage alters the threshold voltage of the prestage AGC-circuit. Sym. input for the AM-Signal in the frequency range of 100 kHz to 160 MHz . GROUND: All DC-Values are referred to this pin. All RF blocking capacitors should be connected to this point. Output for the internal reference voltage. This pin is to be blocked with a ceramic capacitor to RF ground. Input for the frequency divider. Buffered output for the oscillator frequency Buffered output for the by n divided (n= 6 or 10) Oscillator frequency The ext. LC-Circuit determines the oscillator frequency Blocking capacitor for the IF-AGC-Circuit to suppress AF-frequencies Buffered AF output Input-Pins for the DC-coupeled AGC-Amplifier 1. Buffered output for the AGC-controlled lower IF-Signal. This pin is connected to the AM-Stereo-Decoder. Input for the 2. Local oscillator (LO). The pin has to be forced with an ext. signal ----------------------------------------------------------------- .The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 8 SIEMENS AG TDA 4362 X IC-SPECIFICATION ----------------------------------------------------------------- Package Outline Plastic Package P-DSO-28-1 ----------------------------------------------------------------- The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 9 SIEMENS AG TDA 4362 X IC-SPECIFICATION ----------------------------------------------------------------- Absolute Maximum Ratings The maximal ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC will result. # Max. Ratings for ambient temperature Tamb -40C to 85C Symbol Min Max Units Remarks 1 2 3 4 5 6 7 8 9 10 11 12 14 15 16 17 18 19 20 21 22 23 24 Supply voltage V6 Reference voltage V16 Reference current I16 Prestage threshold V12 Mixer 1 input V13, V14 Logical divider input V17 Counter output V18 Divided counter output V19 1.LO V20, V21 Time constant for 2 IF AGC V22 Leakage current I22 AF-output V23 AGC input V24 , V25 , V26 AM-Stereo output V27 2. LO input V28 2. Mixer output V1,2 2. Mixer input V4,5 1. Mixer output V7,8 AGC-Time V9 Prestage AGC V10 PrestageTime constante V11 ESD voltage VESD human body model 100 pF/1500 Thermal Resistance RthSA *) 2 kV ESD protection is not valid for pin 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -2 13.2 5 1 5 5 13.2 13.2 13.2 5 5 1 13.2 5 13.2 5 5 5 13.2 13.2 13.2 13.2 +2 V V mA V V V V V V V uA V V V V V V V V V V kV *) 76 k/W ----------------------------------------------------------------- The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 10 SIEMENS AG TDA 4362 X IC-SPECIFICATION ----------------------------------------------------------------- Operational Range Within the operational range the IC operates as described in the circuit description. The AC / DC characteristic limits are not guaranteed. # Parameter Symbol Min Max Units Remarks 1 2 Supply Voltage Ambient temperature V6 Tamb 7.5 -40 11 +85 V C ---------------------------------------------------------------- The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 11 SIEMENS AG TDA 4362 X IC-SPECIFICATION ----------------------------------------------------------------- AC / DC Characteristics AC / DC characteristics involve the spread of values guaranteed within the specified supply voltage and ambient temperature range. Typical characteristics are the median of the production. # Parameter Symbol Test Conditions Test Circuit Min Typ Max Units Supply voltage Ambient temperature VS=8.5V Tamb= 25 C fIF1= 10.7 MHz fIF2= 450 kHz fi= 1 MHz n=10 Current consumption I6+ I1+I2+ I7+I8 Mixer 1 2 Interceptpoint IP3 |V13-V 14| 3. Order 3 Mixer gain v 20 lg V5 / |V13-V14| 4 Max. input voltage |V13-V14|for -1 dB compression 5 Noise figure (10 MHz) F 1 1. LO 6 7 8 9 10 1 50 62 77 mA Lab 1 1 Lab 0 130 2 4 600 10 dBuV dB mVpp dB Frequency range f1.LO Counter output V18 Divided counter output V19 Output impedance Rex18 Output impedance Rex19 RL=330 RL=330 Lab 1 1 Lab Lab 60 70 35 160 100 50 330 330 MHz mVrms mVrms Converter 11 Mixer gain 12 Noise figure V F 1 Lab 2 5 8 10 dB dB 2. LO 13 Frequency range f2.LO 14 External force voltage V28 1 1 25 60 MHz mVrms Prestage AGC output 15 AGC-Voltage 16 AGC-Voltage 17 Integrator current 18 Integrator current U10 U10 I11* I11* |V13-V 14|=0mVrms |V13-V 14|=400mVrms |V13-V 14|=0mVrms |V13-V 14|=200mVrms 1 1 1 1 6.3 7.2 0.7 -30 30 VS 1 V V uA uA *) integrator currents are measured between the output pin (- Pole of the measurement equipment) and a voltage source with a value of 3VDC (+ Pole). ----------------------------------------------------------------- The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 12 SIEMENS AG TDA 4362 X IC-SPECIFICATION ----------------------------------------------------------------- AC / DC Characteristics AC / DC characteristics involve the spread of values guaranteed within the specified supply voltage and ambient temperature range. Typical characteristics are the median of the production. # Parameter Symbol Test Conditions Test Circuit Min Typ Max Units AGC-Amplifier 19 20 21 22 23 24 25 26 27 28 AGC-Range AGC-Voltage AGC-Voltage AGC-Voltage reg. output voltage Input sensitivity AGC-current AGC-current AGC-current AGC-current Vi= |V25-V 26| 1 Vi=0 mVrms 1 Vi=500 Vrms 1 Vi=30 mVrms 1 RL=100k 1 V23|100mV - 3dB 1 Vi=100mVrms AGC=fast 1 Vi= 0mVrms AGC=fast 1 Vi=100mVrms AGC=slow1 Vi= 0mVrms AGC=slow 1 60 1.1 2.7 48 400 -400 15 -13 66 0.6 1.45 3.1 60 100 500 -500 25 -25 dB V V V mVrms Vrms A A A A V22 V22 V22 V27 Vi I22 I22 I22 I22 1 1.8 3.7 650 -650 35 -33 AM-Demodulator 29 30 31 32 33 34 35 AF output voltage AF output voltage Total harm. distortion Input voltage for S+N/N=6 dB Input voltage for S+N/N=26 dB S+N/N AF-Linearity V23 V23 k Vi Vi V23 Vi= |V25-V 26| m=0.3 m=0.8 V i =10 mVrms, m=0.8 m=0.3 m=0.3 Vi =10 mV, m= 0.8 100V/100 mV Lab 1 1 Lab Lab 1 1 180 480 1 mVrms mVrms % Vrms Vrms 64 3 dB dB 400 10 100 58 560 1.7 Divider Ratio 36 37 Input voltage "L" Input voltage "H" V17 V 17 divide by 10 divide by 6 1 1 0 3.0 1.5 VS V V AGC-Times 38 39 Fast Slow V9 V9 1 1 2.0 0 Vs 0.7 V V Reference voltage 40 Reference voltage V16 1 4.5 4.8 5.1 V ----------------------------------------------------------------- The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 13 SIEMENS AG ---------------------------------------------------------------------------------------------------- Test Circuit RF source 50 RF source audio measure DC DC 1n 50 3x 56k + RF source DC 680 DC TDA 4362 X IC-SPECIFICATION RF RF source measure 330 50 100 220k 50 1k -+ 100k 50 BB304 2.2n 82p MC 122 82p 680 330 1n -+ 47n 1.5k 22n 68n 100p 68n 1F 2.2p 100n 28 27 26 25 24 23 22 21 20 19 18 17 16 15 TDA 4362 X 1 10 22n 5174 Neosid 1.5k DC RF measure GND 2 1n 3 4 330 47n 50 5 6 7 10n 100p 8 M600BCS8400N 9 10 11 12 33n 13 14 33n 50 22n 100n 10 330 10n DC RF DC DC RF source measure DC DC DC DC RF source The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 FS: 04/93 Page 14 ---------------------------------------------------------------------------------------------------- Application Circuit SIEMENS AG TDA 4362 X IC-SPECIFICATION The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved. HL DOK V66047-S1603-C200-G2 20.4.99 |
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